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exar corporation 48720 kato road, fremont ca, 94538 ? (510) 668-7000 ? fax (510) 668-7017 ? www.exar.com XRT59L921 twenty-one channel e1 line interface unit march 2007 rev. 1.2.1 general description the XRT59L921 is an optimized twenty-one channel, e1, line interface unit, fabricated using low power cmos technology. the device contains twenty-one independent e1 channels. it is primarily targeted towards the sdh multiple xers that accommodate tu12 tributary unit frames. line cards in these units multiplex 21 e1 channels into higher sdh rates. devices with 21 e1 interfaces such as the XRT59L921 provide the most efficient method of implementing 63-channel line cards. each channel performs the driver and receiver functions necessary to convert bipolar signals to logical levels and vice versa. the receiver input accepts transformer coupled 1:1 signals, while the transmit ter is coupled to the line using a 1:2 transformer. the same transformer configuration can be used for both balanced and unbalanced interfaces. the device offers loss of signal (los) detection, that provides an los output indication signal with thresholds and delay that comply with the itu g.775 requirements. features ? twenty-one (21) independent e1 (cept) line interface units (transmitter, receiver, and recovery) ? transmit output pulses th at are compliant with the itu-t g.703 pulse template requirement for 2.048mbps (e1) rates ? on-chip pulse shaping for both 75 ? and 120 ? line drivers ? detects and clears los (loss of signal) per itu-t g. 7 7 5 ? operates over the indust rial temperature range ? ultra low powe r consumption ? 3.3v operation with 5v tolerant input applications ? pdh multiplexers ? sdh multiplexers ? digital cross-connect systems ? dect (digital european cordless telephone) base stations ? csu/dsu equipment f igure 1. b lock d iagram of the XRT59L921 channels 2 - 20 channel 1 channel 0 receive equalizer receive equalizer peak detector/slicer peak detector/slicer los detector los detector receive output interface receive output interface pulse shaping circuit pulse shaping circuit transmit input interface transmit input interface rxpos_0 tring_0 ttip_0 rring_0 rtip_0 los_0 txneg_0 txpos_0 rxneg_0 txclk_0 txon
XRT59L921 2 twenty-one channel e1 line interface unit rev. 1.2.1 n ote : refer to pin list for pin names. ordering information p art n umber p ackage o perating t emperature r ange XRT59L921ib 316 shrink thin ball grid array (21.0 mm x 21.0 mm, stbga) -40 c to +85 c f igure 2. p in o ut of the XRT59L921 ( bottom view ) 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 o o o o o o o o o o o o o o o o o o o o a o o o o o o o o o o o o o o o o o o o o b o o o o o o o o o o o o o o o o o o o o c o o o o o o o o o o o o o o o o o o o o d o o o o o o o o o o o o o o o o o o o o e o o o o o o o o o o f o o o o o o o o o o g o o o o o o o o o o h o o o o o o o o o o o o o o j o o o o o o o o o o o o o o k o o o o o o o o o o o o o o l o o o o o o o o o o o o o o m o o o o o o o o o o n o o o o o o o o o o p o o o o o o o o o o r o o o o o o o o o o o o o o o o o o o o t o o o o o o o o o o o o o o o o o o o o u o o o o o o o o o o o o o o o o o o o o v o o o o o o o o o o o o o o o o o o o o w o o o o o o o o o o o o o o o o o o o o y
XRT59L921 i rev. 1.2.1 twenty-one channel e1 line interface unit table of contents general description........ ................. ................ ................ ............... .............. ........... 1 f eatures ............................................................................................................................... ...................... 1 a pplications ............................................................................................................................... ................ 1 f igure 1. b lock d iagram of the XRT59L921 ..................................................................................................................... ........ 1 ordering information ........................................................................................................... ......... 2 f igure 2. p in o ut of the XRT59L921 ( bottom view ).................................................................................................................. 2 t able of c ontents .............. ................ ................ ................. ................ ................. ............ i p in d escriptions ............................................................................................................................... ......... 3 receiver electrical characteristics ...................................................................................... 12 transmitter electrical characteristics ............................................................................... 12 f igure 3. e1. itu g.703 p ulse t emplate for t ransmitter o utput ........................................................................................ 13 dc electrical characteristics .................................................................................................. .13 ac electrical characteristics.................................................................................................. .. 14 p er channel power consumption including the line power dissipation , tranmission and receive paths all active : .............................................................................................................................. ................... 14 a bsolute m aximum r atings ..................................................................................................................... 14 system description ...... ................ ................ ................. ................ ............. ............. ............ ............. 15 1.0 the transmit section .................................................................................................... .............. 15 1.1 the transmit input interface ............. .............. .............. .............. .............. ........... ............ ................ 15 1.2 operating the transmitter in the clock mode ............. .............. .............. .............. .............. ..... 15 f igure 4. i llustration on how the XRT59L921 s amples the data on the t x pos_ n and t x neg_ n input pins ................... 16 1.2.1 operating the transmitt er in the clockless mode........................................................................ ..... 16 1.2.2 shutting off the transmiter............................................................................................ .............................. 16 f igure 5. i llustration on how the t erminal e quipment should apply data to the t ransmit s ection of a given c hannel ( with - in the XRT59L921), when operating in the c lockless m ode .................................................................................. 17 1.3 the pulse shaping circuit ............................................................................................... .................... 17 f igure 6. i llustration of the itu-t g.703 p ulse t emplate for e1 a pplications ................................................................ 18 1.4 interfacing the transmit sections of the xrt 59l921 to the line ........ ............... ........... ..... 18 f igure 7. i llustration of how to interface the t ransmit s ections of the XRT59L921 to the l ine ( for 75w a pplications ) 19 f igure 8. i llustration of how to interface the t ransmit s ections the XRT59L921 to the l ine ( for 120w a pplications )19 transmit transformer recommendations ........................................................................................... ...................... 19 the following transformers are recommended for use... .......................................................................... .............. 20 m agnetic s upplier i nformation .............................................................................................................. 20 2.0 the receive section ..................................................................................................... ................ 21 2.1 interfacing the receive sections to the line (transformer coupling) ......................... 21 f igure 9. r ecommended s chematic for i nterfacing the r eceive s ections of the XRT59L921 to the l ine for 75w a pplica - tions (t ransformer -c oupling ) .............................................................................................................................. .... 21 f igure 10. r ecommended s chematic for i nterfacing the r eceive s ections of the XRT59L921 to the l ine for 120w a ppli - cations (t ransformer -c oupling ) .............................................................................................................................. 22 transformer recomendation ...................................................................................................... 23 receive transformer recommendations ............................................................................................ ...................... 23 2.2 interfacing the XRT59L921 receive section to the line (capacitive coupling) ............. 23 f igure 11. r ecommended 75w c apacitive c oupling a pplication ........................................................................................... 23 f igure 12. r ecommended 120w t wisted p air c apacitive c oupling a pplication .................................................................. 23 2.3 the receive equalizer bock .............................................................................................. ................. 24 2.4 the peak detector and slicer block ...................................................................................... ....... 24 2.5 the los detector block .................................................................................................. .................... 24 f igure 13. i llustration of the s ignal l evels that the r eceiver s ections ( within XRT59L921) will declare and clear los 24 f igure 14. t he b ehavior of the los o utput i ndicator , in response to the l oss of s ignal , and the r estoration of the s ig - nal ............................................................................................................................... ................................................. 25 2.6 los mute description .................................................................................................... ........................ 25 2.7 the receive output interface block ...................................................................................... ....... 25 3.0 shutting off the transmitter ............................................................................................ .... 25 f igure 15. t ransmit t iming d iagram ............................................................................................................................... .......... 26 f igure 16. r eceive t iming d iagram ............................................................................................................................... ............ 26 application information ................. ................ ................ ................ ............. ............. ............. ......... 27
XRT59L921 ii twenty-one channel e1 line interface unit rev. 1.2.1 f igure 17. i llustration on how to interface c hannel 1 ( of the XRT59L921) to the l ine (r eceiver is t ransformer - coupled to a 75w unbalanced line ) .............................................................................................................................. ........... 27 f igure 18. i llustration on how to interface c hannel 1 ( of the XRT59L921) to the l ine (r eceiver is t ransformer - coupled to a 120w balanced line ) .............................................................................................................................. ............. 28 ordering information....... ................ ................ .............. ............... .............. ...........29 package dimensions........ ................. ................ ................ ............... .............. ...........29 r evision h istory ............................................................................................................................... ........30
XRT59L921 3 rev. 1.2.1 twenty-one channel e1 line interface unit pin descriptions p in # s ymbol t ype d escription d8 c9 d9 a10 c11 a12 v10 y9 u9 v8 u7 u14 y14 v12 y12 y11 b13 d13 c14 b14 a15 rxpos_0 rxpos_1 rxpos_2 rxpos_3 rxpos_4 rxpos_5 rxpos_6 rxpos_7 rxpos_8 rxpos_9 rxpos_10 rxpos_11 rxpos_12 rxpos_13 rxpos_14 rxpos_15 rxpos_16 rxpos_17 rxpos_18 rxpos_19 rxpos_20 o receiver positive data out ? channel_n: (n=0 to 20) this output pin will pulse ?high? w henever channel_n, within the XRT59L921 has received a positive polarity pulse, in the incoming line signal, at rtip_n/rring_n inputs. e7 c8 e9 b9 c10 b11 v9 w8 t9 u8 t7 t14 w14 v13 w12 w10 c12 e13 d14 c15 a14 rxneg_0 rxneg_1 rxneg_2 rxneg_3 rxneg_4 rxneg_5 rxneg_6 rxneg_7 rxneg_8 rxneg_9 rxneg_10 rxneg_11 rxneg_12 rxneg_13 rxneg_14 rxneg_15 rxneg_16 rxneg_17 rxneg_18 rxneg_19 rxneg_20 o receiver negative data out ? channel_n: this output pin will pulse ?high? w henever channel_n, within the XRT59L921 has received a negative polarity pulse, in the incoming line signal, at rtip_n/rring_n inputs.
XRT59L921 4 twenty-one channel e1 line interface unit rev. 1.2.1 d7 b8 e8 a9 b10 a11 w9 y8 t8 v7 t6 t15 y13 w13 w11 y10 b12 e14 c13 b15 a13 los_0 los_1 los_2 los_3 los_4 los_5 los_6 los_7 los_8 los_9 los_10 los_11 los_12 los_13 los_14 los_15 los_16 los_17 los_18 los_19 los_20 o receiver loss of signal output indicator ? channel_n: this output pin toggles ?high? if ch annel_n, within the XRT59L921 has detected a loss of signal condition in the incoming line signal. b1 d1 e1 g1 h1 k1 l1 n1 p1 t1 u1 u20 t20 p20 n20 l20 k20 h20 g20 e20 d20 rtip_0 rtip_1 rtip_2 rtip_3 rtip_4 rtip_5 rtip_6 rtip_7 rtip_8 rtip_9 rtip_10 rtip_11 rtip_12 rtip_13 rtip_14 rtip_15 rtip_16 rtip_17 rtip_18 rtip_19 rtip_20 i receiver_n positive bipolar input ? channel_n: the receive section of channel_n uses this input pin, along with rring_n to receive the bipolar line signal from the remote e1 terminal. pin descriptions p in # s ymbol t ype d escription
XRT59L921 5 rev. 1.2.1 twenty-one channel e1 line interface unit c1 d2 e2 g2 h2 k2 l2 n2 p2 t2 u2 u19 t19 p19 n19 l19 k19 h19 g19 e19 d19 rring_0 rring_1 rring_2 rring_3 rring_4 rring_5 rring_6 rring_7 rring_8 rring_9 rring_10 rring_11 rring_12 rring_13 rring_14 rring_15 rring_16 rring_17 rring_18 rring_19 rring_20 i receiver negative bipolar input ? channel_n: the receive section of channel_n uses this input pin, along with rtip_n to receive the bipolar line signal from the remote e1 terminal. v11 txon i transmit on/off input: upon power up, all of the transmitters ar e powered off. if the txon pin is pulled "high" all 21 transmitters are powered on. individual channels can be powered down by connecting txclk_n "low" and wi th tpos_n/tneg_n data applied to that channel_n. n ote : internally pulled "low" with a 50k ? resistor. pin descriptions p in # s ymbol t ype d escription
XRT59L921 6 twenty-one channel e1 line interface unit rev. 1.2.1 c4 d5 f4 g5 j4 k5 m4 n5 r4 t5 v4 v17 t16 r17 n16 m17 k16 j17 g16 f17 d16 ttip_0 ttip_1 ttip_2 ttip_3 ttip_4 ttip_5 ttip_6 ttip_7 ttip_8 ttip_9 ttip_10 ttip_11 ttip_12 ttip_13 ttip_14- ttip_15- ttip_16- ttip_17 ttip_18 ttip_19 ttip_20 o transmitter positive bipolar output ? channel_n: channel_n within the XRT59L921 will use this pin, along with tring_n, to transmit a bipolar line signal, via a 1:2 step-up transformer. c3 d4 f3 g4 j3 k4 m3 n4 r3 t4 v3 v18 t17 r18 n17 m18 k17 j18 g17 f18 d17 tring_0 tring_1 tring_2 tring_3 tring_4 tring_5 tring_6 tring_7 tring_8 tring_9 tring_10 tring_11 tring_12 tring_13 tring_14 tring_15 tring-16 tring_17 tring_18 tring_19 tring_20 o transmitter negative bipolar output ? channel_n: channel_n within the XRT59L921 will use this pin, along with ttip_n, to transmit a bipolar line signal, via a 1:2 step-up transformer. pin descriptions p in # s ymbol t ype d escription
XRT59L921 7 rev. 1.2.1 twenty-one channel e1 line interface unit a2 a4 a6 c7 e6 a8 u6 w5 y6 y4 w2 y19 y17 y15 v15 u15 e15 c18 b17 a18 b20 txclk_0 txclk_1 txclk_2 txclk_3 txclk_4 txclk_5 txclk_6 txclk_7 txclk_8 txclk-9 txclk_10 txclk_11 txclk_12 txclk_13 txclk_14 txclk_15 txclk_16 txclk_17 txclk_18 txclk_19 txclk_20 i transmitter clock input ? channel_n: if the user operates channel_n (within the XRT59L921) in the clock mode, then the transmit section of the channel_n will use th e falling edge of this signal to sample the data at the txpos_n and txneg_n input pins. n ote : if the user operates the channel_n in the clockless mode, then the terminal equipment should not apply a clock signal to this input pin and txclk should be tied "high". b3 b4 b6 d6 e4 b7 u4 v6 w7 w4 w3 w19 w17 w16 v14 u17 e17 c16 b16 b18 b19 txneg_0 txneg_1 txneg_2 txneg_3 txneg_4 txneg_5 txneg_6 txneg_7 txneg_8 txneg_9 txneg_10 txneg_11 txneg_12 txneg_13 txneg_14 txneg_15 txneg_16 txneg_17 txneg_18 txneg_19 txneg_20 i transmitter - negative data input ? channel_n: the exact signal that should be applied to this input pin depends upon whether the user intends to operate the transmit section (of channel_n) in the clock or clock - less mode clock mode: the terminal equipment should apply bit-wi de nrz pulses on this input pin, when - ever the terminal equipment needs to tr ansmit a negative-pola rity pulse onto the line via ttip_n and tring_n output pins. the XRT59L921 will sample this input pin upon the falling edge of the tclk_n signal. clockless mode: the terminal equipment should apply rz pulse s to this input pin, anytime the termi - nal equipment needs to transmit a negative- polarity pulse onto the line viattip_n and tring_n output pins. n ote : in clockless mode, transmit output pulse width is determined by the rz signal applied to txneg/txpos. pin descriptions p in # s ymbol t ype d escription
XRT59L921 8 twenty-one channel e1 line interface unit rev. 1.2.1 a3 a5 b5 c6 e5 a7 u5 w6 y7 y5 y3 y18 w18 y16 w15 u16 e16 c17 a16 a17 a19 txpos_0 txpos_1 txpos_2 txpos_3 txpos_4 txpos_5 txpos_6 txpos_7 txpos_8 txpos_9 txpos_10 txpos_11 txpos_12 txpos_13 txpos_14 txpos_15 txpos_16 txpos_17 txpos_18 txpos_19 txpos_20 i transmitter - positive data input ? channel_n: the exact signal that should be applied to this input pin depends upon whether the user intends to operate the transmit section (of channel_n) in the clock or clock - less mode. clock mode: the terminal equipment should apply bit-wide nrz pulses on this input whenever the terminal equipment needs to transmit a positive-polarity pul se onto the line via ttip_n and tring_n output pins. the XRT59L921 will sample this input pin upon the falling edge of the tclk_n signal. clockless mode: the terminal equipment should apply rz pulse s to this input pin, anytime the termi - nal equipment needs to transmit a positive-polarity pulse onto the line via ttip_n and tring_n output pins. l5 tck i jtag test clock input, boundary scan clock input: n ote : this input pin should be pulled "low" for normal operation. internally pulled "high" with a 50k ? resistor. h4 tdi i jtag test data input, boundary scan test data input: n ote : this input pin should be pulled "low" for normal operation. internally pulled "high" with a 50k ? resistor. l4 tdo o jtag test data output: boundary scan test data output: h5 tms i jtag test mode select, boundary scan test mode select input pin: p4 trst i jtag test mode reset, boundary scan mode reset input pin: n ote : this input pin should be pulled "low" for normal operation. internally pulled "high" with a 50k ? resistor. h17 t13 u13 factory test pins factory test pins: the customer must tie these pins to ground for normal operation. e10 e12 t10 t12 l16 agnd agnd agnd agnd agnd - analog ground - receivers pin descriptions p in # s ymbol t ype d escription
XRT59L921 9 rev. 1.2.1 twenty-one channel e1 line interface unit d10 d12 u10 u12 l17 avdd avdd avdd avdd avdd - positive supply - (+3.3v 5%). receivers a1 a20 y1 y2 y20 u11 w20 c20 d11 dvdd dvdd dvdd dvdd dvdd dvdd - positive supply (+3.3v 5%). digital circuitry. f1 f20 j1 j20 m1 m20 r1 r20 w1 t11 v1 v20 c19 e11 b2 dgnd dgnd dgnd dgnd dgnd dgnd - digital ground: digital circuitry. pin descriptions p in # s ymbol t ype d escription
XRT59L921 10 twenty-one channel e1 line interface unit rev. 1.2.1 h16 j9 j10 j11 j12 k9 k10 k11 k12 l9 l10 l11 l12 m9 m10 m11 m12 p5 p16 p17 agnd - ground pins d15 n/c - no connect pin descriptions p in # s ymbol t ype d escription
XRT59L921 11 rev. 1.2.1 twenty-one channel e1 line interface unit c2 d3 f2 g3 j2 k3 m2 n3 r2 t3 v2 v19 t18 r19 n18 m19 k18 j19 g18 f19 d18 tgnd_0 tgnd_1 tgnd_2 tgnd_3 tgnd_4 tgnd_5 tgnd_6 tgnd_7 tgnd_8 tgnd_9 tgnd_10 tgnd_11 tgnd_12 tgnd_13 tgnd_14 tgnd_15 tgnd_16 tgnd_17 tgnd_18 tgnd_19 tgnd_20 - digital ground. transmitter_n c5 e3 f5 h3 j5 l3 m5 p3 r5 u3 v5 v16 u18 r16 p18 m16 l18 j16 h18 f16 e18 tvdd_0 tvdd_1 tvdd_2 tvdd_3 tvdd_4 tvdd_5 tvdd_6 tvdd_7 tvdd_8 tvdd_9 tvdd_10 tvdd_11 tvdd_12 tvdd_13 tvdd_14 tvdd_15 tvdd_16 tvdd_17 tvdd_18 tvdd_19 tvdd_20 - positive supply (+3.3v 5%), transmitter_n pin descriptions p in # s ymbol t ype d escription
XRT59L921 12 twenty-one channel e1 line interface unit rev. 1.2.1 receiver electrical characteristics t a =-40 to 85c, v dd =3.3v5%, unless otherwise specified. parameter m in t yp m ax u nit t est c onditions receiver loss of signal: threshold to assert - 20 - db cable attenuation @ 1024khz threshold to clear - 15 - db time delay 10 - 255 bit per itu-g.775 hysteresis - 5 - db receiver sensitivity 9 11 - db below nominal pulse amplitude of 3.0v for 120 ? and 2.37v for 75 ? applications. interference margin -18 -14 - db with 6db cable loss. input impedance 5 - - k ? jitter tolerance: 20hz 10 uipp 700hz 5 - - uipp 10khz ?100khz 0.3 uipp return loss: 51khz ?102khz 14 - - db per itu-g.703 102khz?2048khz 20 - - db 2048khz?3072khz 16 - - db transmitter electrical characteristics ta=-40 to 85c, vdd=3.3v5%, unless otherwise specified parameter m in t yp m ax u nit t est c onditions ami output pulse amplitude: 75 ? application 2.13 2.37 2.60 v use transformer with 1:2 ratio and 9.1 ? resistor in series with each end of primary 120 ? application 2.70 3.0 3.30 v output pulse width 224 244 264 ns output pulse width ratio 0.95 ? 1.05 ? per itu-g.703 output pulse amplitude ratio 0.95 ? 1.05 ? per itu-g.703 output return loss: 51khz ?102khz 8 - - db per etsi 300 166 and g.703 102khz?2048khz 8 - - db 2048khz?3072khz 8 - - db
XRT59L921 13 rev. 1.2.1 twenty-one channel e1 line interface unit f igure 3. e1. itu g.703 p ulse t emplate for t ransmitter o utput dc electrical characteristics ta=-25c, vdd=3.3v5%, unless otherwise specified p arameter s ymbol m in t yp m ax u nit power supply voltage vdd 3.13 3.3 3.46 v input high voltage vih 2.0 - 5.0 v input low voltage vil -0.5 - 0.8 v output high voltage @ ioh=-5ma voh 2.4 - - v output low voltage @ iol=5ma vol - - 0.4 v input leakage current (except input pins w/ pull-up resistor.) il - - 10 a input capacitance ci 5.0 pf output load capacitance cl - - 25 pf 10% 10% 10% 10% 10% 10% 269 ns (2 44 + 25 ) 194 ns (2 44 ? 50 ) 244 ns 219 ns (24 4 ? 2 5) 488 ns (244 + 244) 0% 50% 20% v=100% nominal pulse note ? v corresponds to the nominal peak value. 20% 20%
XRT59L921 14 twenty-one channel e1 line interface unit rev. 1.2.1 ac electrical characteristics ta=-25c, vdd=3.3v5%, unless otherwise specified p arameter s ymbol m in t yp m ax u nit tclk clock period t 1 - 488 - ns tclk duty cycle t 2 47 50 53 % transmit data setup time t su 50 - - ns transmit data hold time t ho 30 - - ns transmit data prop. delay time - rz data mode - nrz data mode (clock mode) t 3 - - 30 30 - - ns ns tclk rise time(10%/90%) t r - - 40 ns tclk fall time(90%/10%) t f - - 40 ns receive data rise time r tr - - 40 ns receive data fall time r tf - - 40 ns receive data prop. delay r pd - 75 - ns receive data pulse width r xpw 200 244 350 ns per channel power consumption including th e line power dissipation, tranmission and receive paths all active: ta=-40 to 85c, vdd=3.3v5%, unless otherwise specified p arameter s ymbol m in t yp m ax u nit c onditions power consumption pc - 510 mw 75 ? load, operating at 50% mark density. power consumption pc - 650 mw 120 ? load, operating at 50% mark density. power consumption pc - 1000 mw 75 ? load, operating at 100% mark density. power consumption pc - 900 mw 120 ? load, operating at 100% mark density. power consumption pc - 170 mw transmitter in powered-down mode. absolute maximum ratings storage temperature -65c to + 150c operating temperature -40c to + 85c esd rating >2000v on all pins n ote : human body model, 100pf capacitor discharged through a 1.5k ? resistor. supply voltage -0.5v to + 6.0v
XRT59L921 15 rev. 1.2.1 twenty-one channel e1 line interface unit system description the XRT59L921 is a twenty-one (21) channel e1 tran sceiver that provides an electrical interface for 2.048mbps applications. each of the twenty-one channels includes a receive circuit that converts an itu-t g.703 compliant bipolar signal into a ttl compatible logic levels. each receiver also includes an los (loss of signal) detection circuit. similarly, in the transmit direction, each transmitter converts ttl compatible logic levels into a g.703 compatible bipolar signal. the tran smitter may be operated in either a clock or clockless mode. each channel within the XRT59L921 liu consists of both a transmit section and a receive section, each of these sections will be discussed in detail below. 1.0 the transmit section in general, the purpose of the transmit section (withi n each channel of the XRT59L921) is to accept ttl/ cmos level digital data (from the terminal equipment), and to encode it into a format such that it can: 1. be efficiently transmitted over coaxial- or twistedpair cable at the e1 data rate and 2. be reliably received by the remote terminal equipment at the other end of the e1 data link. 3. comply with the itu-t g.703 pulse templa te requirements, for e1 applications. the circuitry that the transmit section (within the xr t59l921) uses to accomplish this goal is discussed below. the transmit section of the XRT59L921 consists of the following blocks: ? transmit input interface ? pulse shaping block 1.1 the transmit input interface the transmit input interface accepts either clock or cl ockless data from the terminal equipment. the manner in how the terminal equipment should apply data to a given channel within the XRT59L921 depends upon whether the channel is being operated in the clock or clockless mode. 1.2 operating the transmitter in the clock mode the user can configure a given channel (within the xr t59l921) to operate in the clock mode by simply applying a 2.048mhz clock signal to the txclk_n input pin (where x denotes a given channel within the XRT59L921). the XRT59L921 contains circ uitry that senses activi ty on the txclk_n line. if this circuit senses activity on the txclk_n line, then the corresponding channel will automatically be operat ing in the clock mode. in the clock mode, the terminal equipment is expected to apply a 2.048mhz clock signal at the txclk_n input pin and nrz data at the txpos_n and txneg_n input pins. the transmit input interface ci rcuit will sample the data, at the txpos_n and txne g_n input pins, up on the falling edge of txcl k_n, as illustrated in figure 4 .
XRT59L921 16 twenty-one channel e1 line interface unit rev. 1.2.1 in general, if the XRT59L921 samples a ?1? on the txpos_n input pin, then the transmit section of the device will ultimately generate a positive polarity pulse via th e ttip_n and tring_n output pins (across a 1:2 trans - former). conversely, if the XRT59L921 samples a ?1? on the txneg_n input pin, then the transmit section of the device will ultimately generate a negative polarity pulse via the ttip_n and tring_n output pins (across a 1:2 transformer). 1.2.1 operating the transmitter in the clockless mode the user can configure a given channel (within thexrt59 l921) to operate in the clockless mode by doing the following: ? not applying a clock signal to the txcl k_n input, and pulling this pin to vdd. ? by applying rz (return to zero) data to the tx pos_n and txneg_n input pi ns, as illustrated below. ? if txclk_n is grounded and rz data is applied to tpos and tneg, th e transmitter will be powered down and tri-stated. 1.2.2 shutting off the transmiter the transmit driver for each channel_n (within the xrt5 9l921) can be shut off. to activate this feature, connect the txclk_n input pin to a logic "0" (e.g. gn d) and continue to apply data via the txpos_n and txneg_n input pins. f igure 4. i llustration on how the XRT59L921 s amples the data on the t x pos_ n and t x neg_ n input pins t su t ho txpos_n txneg_n tclk_n
XRT59L921 17 rev. 1.2.1 twenty-one channel e1 line interface unit figure 5 , indicates that when the user is operating a c hannel in the clockless mode, then the corresponding terminal equipment must do the following: ? not apply a signal on the txclk_n line and connect txclk to "high" ? when applying a pulse (to either the txpos_n or txneg_n input pin), apply an rz pulse to the appropriate input pin. this rz pulse should only have a width of one-half the bit-period. 1.3 the pulse shaping circuit the purpose of the transmit pulse shap ing circuit is to generate transmit output pulses that comply with the itu-t g.703 pulse template requi rements for e1 applications. f igure 5. i llustration on how the t erminal e quipment should apply data to the t ransmit s ection of a given c hannel ( within the XRT59L921), when operating in the c lockless m ode txpos_n txneg_n tclk_n 11 1 1 1 0 0 data bit period rz pulse is to be applied in the first half of the bit-period no pulse is to be applied in the 2nd half of the bit-period no activity in txclk line, txclk_n="high"
XRT59L921 18 twenty-one channel e1 line interface unit rev. 1.2.1 each channel (within the xr t59l921) will take each mark (which is pr ovided to it via the transmit input interface block, and will generate a pulse that complies with the pulse template, presented in figure 6 , (when measured on the secondary-side of the transmit output transformer). 1.4 interfacing the transmit sections of the XRT59L921 to the line itu-t g.703 specifies that the e1 line signal can be transmitted over coaxial cable and terminated with 75 ? or transmitted over twisted-pair and terminated with 120 ? . however, in both ap plications (e.g., 75 ? or 120 ? ), the user is advised to interface the transmitter to the line, in the manner as depicted in figure 7 and figure 8 , respectively. f igure 6. i llustration of the itu-t g.703 p ulse t emplate for e1 a pplications 10% 10% 10% 10% 10% 10% 269 ns (244 + 25) 194 ns (244 ? 50) 244 ns 219 ns (244 ? 25) 488 ns (244 + 244) 0% 50% 20% v = 100% nominal pulse note ? v corresponds to the nominal peak value. 20% 20%
XRT59L921 19 rev. 1.2.1 twenty-one channel e1 line interface unit n otes : 1. figure 7 and figure 8 , indicate that for both 75 ? and 120 ? applications, the user should connect a 9.1 ? resistor, in series, between the ttip/tring outputs and the transformers. 2. figure 5 and 6, indicate that the user should use a 1:2 step-up transformer. f igure 7. i llustration of how to interface the t ransmit s ections of the XRT59L921 to the l ine ( for 75 ? a pplications ) f igure 8. i llustration of how to interface the t ransmit s ections the XRT59L921 to the l ine ( for 120 ? a pplications ) t ransmit t ransformer r ecommendations p arameter v alue turns ratio 1:2 primary inductance isolation voltage leakage inductance 9.1 ? 9.1 ? txpos_n txneg_n txclk_n XRT59L921 txclk_n txpos_n txneg_n ttip_n tring_n 1:2 coaxial cable 9.1 ? 9.1 ? txpos_n txneg_n txclk_n XRT59L921 txclk_n txpos_n txneg_n ttip_n tring_n tring_channel_n ttip_channel_n 1:2
XRT59L921 20 twenty-one channel e1 line interface unit rev. 1.2.1 n ote : more transformers will be added to this list as they are evaluated . magnetic supplier information pulse corporate office 12220 world trade drive san diego, ca 92128 tel: (619)-674-8100 fax: (619)-674-8262 europe 1 & 2 huxley road the surrey research park guildford, surrey gu2 5re united kingdom tel: 44-1483-401700 fax: 44-1483-401701 asia 150 kampong ampat #07-01/02 ka centre singapore 368324 tel: 65-287-8998 fax: 65-280-0080 transpower technologies corporate office 9410 prototype drive, ste #1 reno, nv 89511 tel: (800)511-7308 or (775)852-0140 fax: (775)852-0145 www.trans-power.com halo electronics t he following t ransformers are r ecommended for u se p art n umber v endor i solation p ackage t ype pe-65835 pulse tti 7154-r transpower technologies, inc. tg26-1205 halo
XRT59L921 21 rev. 1.2.1 twenty-one channel e1 line interface unit p.o. box 5826 redwood city, ca 94063 tel: (650)568-5800 fax: (650)568-6161 2.0 the receive section the receive sections of the XRT59L921 consists of the following blocks: ? the receive equalizer block ? the peak detector and slicer block ? the los detector block ? the receive output interface block 2.1 interfacing the receive sections to the line (transformer coupling) the design of each channel (within the XRT59L921) permits the user to transformer-couple the receive section to the line. additionally, as mentioned ear lier, the specification documents for e1 specify 75 ? termination loads, when transmitting over coaxial cable, and 120 ? loads, when transmitting over twisted-pair. figure 9 , and figure 10 present the two methods that the user can employ in order to interface the receivers (of the XRT59L921) to the line. f igure 9. r ecommended s chematic for i nterfacing the r eceive s ections of the XRT59L921 to the l ine for 75 ? a pplications (t ransformer -c oupling ) 75 ? rxpos_n rxneg_n los_n XRT59L921 los_n rxpos_n rxneg_n rtip_n rring_n 1:1 coaxial cable
XRT59L921 22 twenty-one channel e1 line interface unit rev. 1.2.1 n ote : figure 9 and figure 10 indicate that the user should use a 1:1 trans former, when interfacing the receiver to the line. f igure 10. r ecommended s chematic for i nterfacing the r eceive s ections of the XRT59L921 to the l ine for 120 ? a pplications (t ransformer -c oupling ) 120 ? rxpos_n rxneg_n los_n XRT59L921 los_n rxpos_n rxneg_n rtip_n rring_n 1:1 rtip_n rring_n
XRT59L921 23 rev. 1.2.1 twenty-one channel e1 line interface unit transformer recomendation 2.2 interfacing the XRT59L921 receive s ection to the line (capacitive coupling) figure 11 and figure 12 are recommended methods to interface the the receive sections of the XRT59L921to the line. r eceive t ransformer r ecommendations p arameter v alue turns ratio 1:1 primary inductance isolation voltage leakage inductance f igure 11. r ecommended 75 ? c apacitive c oupling a pplication f igure 12. r ecommended 120 ? t wisted p air c apacitive c oupling a pplication 150 ? rxpos_n rxneg_n los_n XRT59L921 los_n rxpos_n rxneg_n rtip_n rring_n 0.1 f 0.1 f 150 ? coaxial cable 240 ? rxpos_n rxneg_n los_n XRT59L921 los_n rxpos_n rxneg_n rtip_n rring_n 0.1 f 0.1 f 240 ? 120 ? twisted pair cable
XRT59L921 24 twenty-one channel e1 line interface unit rev. 1.2.1 2.3 the receive equalizer bock after a given channel (within the XRT59L921) has received the incoming line signal, via the rtip_n and rring_n input pins, the first block that this signa l will pass through is the receive equalizer block. as the line signal is transmitted from a given transmitting terminal, the pulse shapes (at that location) are basically square. hence, these pulses consist of a comb ination of low and high frequency fourier components. as this line signal travels from the transmitting terminal (via the coaxial cable or t wisted pair) to the receiving terminal, it will be subjected to freq uency-dependent loss. in other words, the higher fr equency comp onents of the signal will be subjected to a greater amount of attenuation than the lo wer frequency components. if this line signal travels over reasonably long cabl e lengths, then the shape of the pulses (which were originally square) will be distorted and with inter-sy mbol interference increases. the purpose of this block is to equalize the incoming distorted signal, due to cable loss. in essence, the receive equalizer block acco mplishes this by subjecting the received line signal to frequency-dependent amplification (which attempts to counter the frequency-d ependent loss that the line signal has experienced). by doing this, the receive equalizer is attempting to restor e the shape of the line signal so that the received data can be recovered reliably. 2.4 the peak detector and slicer block after the incoming line signal has pa ssed through the receive equalizer bl ock, it will next be routed to the slicer block. the purpose of the slicer block is to qua ntify a given bit-period (or symbol) within the incoming line signal as either a ?1? or a ?0?. 2.5 the los detector block the los detector block, within each channel (of the xr t59l921) was specifically designed to comply with the los declaration/clearance requirements per itu-t g. 775. as a consequence, th e channel will declare a los condition, (by driving the rxlos outp ut pin ?high?) if the received line signal amplitude drops to ?20db or below. further, the channe l will clear the los condition if the signal amplitude rises back up to ?15db or above. figure 13 presents an illustration that depicts the signa l levels at which a gi ven channel (within the XRT59L921) will assert and clear los. timing requirements associated with declaring and clearing the los indicator. the XRT59L921 was designed to meet the itu-t g.775 s pecification timing requirements for declaring and clearing the los f igure 13. i llustration of the s ignal l evels that the r eceiver s ections ( within XRT59L921) will declare and clear los los signal must be cleared minimum cable loss for e1 los signal must be cleared or declared los signal must be declared 0db -6db -9db -35db
XRT59L921 25 rev. 1.2.1 twenty-one channel e1 line interface unit indicator. in particular, the XRT59L921 will declare a los, between 10 and 255 ui (o r e1 bit-periods) after the actual time the los condit ion occurred. further, the XRT59L921 will clear the los in dicator within 10 to 255 ui after restoration of the incoming line signal. figure 14 illustrates the los decl aration and clearance behavior, in response to first, the loss of signal even t and then afterwards, the restoration of the signal. 2.6 los mute description the losmute feature is included in the XRT59L921 such that when the input signal to a receiver is too low or is lost. the los_n pin will toggle "hig h" and at the same time the rpos _n and rneg_n outputs are muted to a "zero" state to prevent output data chattering. 2.7 the receive output interface block the purpose of the receive output interface block is to interface directly with the receiving terminal equipment. the receive output interface block outputs the data (which has been recovered from the incoming line signal) to the receive terminal equipment via the rxpos_n and rxneg_n output pins. if the receive sections of the XRT59L921 has received a positive-polarity pulse, via the rtip_n and rring_n input pins, then the receive outp ut interface will output a pulse via the rxpos_n output pins. similarly, if the receive sections of the XRT59L921 has received a negative-polarity pulse, via the rtip_n and rring_n input pins, then the re ceive output interface will output a pulse via the rxneg_n output pins. n ote : the receive output interface block does not supply a recove red clock. this device is intended to be used in those applications, where the clock recovery circuit is realized in an asic solution. 3.0 shutting off the transmitter each channel (within the XRT59L921) permits the user to shut off the transmit driver within their respective transmit section. this feature can come in handy for system redundancy design considerations or during diagnostic testing. the user can activate this feature by connecting the txclk_n input pin to a logic ?0? (e.g., gnd) and continue to apply data via the txpos_n and txneg_n input pins. f igure 14. t he b ehavior of the los o utput i ndicator , in response to the l oss of s ignal , and the r estoration of the s ignal los output pin 0 ui 0ui 10 ui 10 ui actual occurrence of los condition line signal is restored 255 ui 255 ui rxin g.775 compliance g.775 compliance time range for los declaration time range for los clearance
XRT59L921 26 twenty-one channel e1 line interface unit rev. 1.2.1 f igure 15. t ransmit t iming d iagram f igure 16. r eceive t iming d iagram t 1 t 2 t su t ho t xpw t 3 vtxout t r t f tclk txpos or tneg ttip/ tring t xpw t 3 vtxout ttip/ tring rz mode (non-clock mode) nrz mode (clock mode) txpos or tneg r tf r tr r xpw r pd rring /rtip rxpos rxneg
XRT59L921 27 rev. 1.2.1 twenty-one channel e1 line interface unit application information figure 17 and figure 18 , provide example schematics on how to inte rface channel 1 of the XRT59L921 to the line, under the following conditions. ? receiver is transformer-coupled to a 75 ? unbalanced line. ? receiver is transformer-coupled to a 120 ? balanced line. f igure 17. i llustration on how to interface c hannel 1 ( of the XRT59L921) to the l ine (r eceiver is t ransformer - coupled to a 75 ? unbalanced line ) 9.1 ? 9.1 ? txpos_x txneg_x txlineclk_x XRT59L921 txlineclk_x txpos_x txneg_x ttip_x tring_x 1:2 75 ? rxpos_x rxneg_x loss of signal_x rxlos_x rxpos_x rxneg_x rtip_x rring_x 1:1
XRT59L921 28 twenty-one channel e1 line interface unit rev. 1.2.1 f igure 18. i llustration on how to interface c hannel 1 ( of the XRT59L921) to the l ine (r eceiver is t ransformer - coupled to a 120 ? balanced line ) 9.1 ? 9.1 ? txpos_x txneg_x txlineclk_x XRT59L921 txlineclk_x txpos_x txneg_x ttip_x tring_x tring_x ttip_x 1:2 120 ? rxpos_x rxneg_x loss of signal_x rxlos_x rxpos_x rxneg_x rtip_x rring_x 1:1 rtip_x rring_x
XRT59L921 29 rev. 1.2.1 twenty-one channel e1 line interface unit ordering information package dimensions p roduct n umber p ackage o perating t emperature r ange XRT59L921ib 316 shrink thin ball grid array (21.0 mm x 21.0 mm, stbga) -40 0 c to +85 0 c symbol min max min max a 0.056 0.067 1.41 1.69 a1 0.011 0.015 0.28 0.38 a2 0.019 0.022 0.48 0.56 a3 0.026 0.030 0.65 0.75 d 0.819 0.835 20.80 21.20 d1 0.7480 bsc 19.00 bsc e 0.819 0.835 20.80 21.20 e1 0.7480 bsc 19.00 bsc b 0.018 0.022 0.45 0.55 e 0.0394 bsc 1.00 bsc inches millimeters note: the control dimension is in millimeter.
30 notice exar corporation reserves the right to make changes to the products contained in this publicat ion in order to improve design, performanc e or reliability. exar corp oration assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infr ingement. charts and schedules contai ned here in are only for illustration purposes and may vary depending upon a user?s specific application. while the information in this publication has been carefully ch ecked; no responsibility, however , is assumed for inaccuracies. exar corporation does not re commend the use of any of its products in life suppo rt applications where the failure or malfunction of the product can reasonably be ex pected to cause failure of the life support system or to significantly affect its safety or effectiveness. products ar e not authorized for use in such applications unless exar corporation receives , in writing, assuranc es to its satisfaction that: (a) th e risk of injury or damage has been minimized; (b) th e user assumes all such ris ks; (c) potential liability of exar corporation is adequately protected under the circumstances. copyright 2007 exar corporation datasheet march 2007. reproduction, in part or whole, without the prior written consent of exar co rporation is prohibited. XRT59L921 twenty-one channel e1 line interface unit rev. 1.2.1 revision history r evision # d ate d escription p1.0.0 09/01/04 1st release of the XRT59L921 preliminary data sheet. p1.0.1 10/28/04 ccorrected receive transformer turns ratio from 1:2 to 1:1. added package outline drawing and pin numbers. other minor edits 1.0.0 06/23/05 replaced power supply current tbd?s with actual. release to production 1.1.0 09/07/05 added comment to txclk pin description, added note to txneg pin description[, deleted "with -18db------" comment from electrical receiver sensitivity, minor edit to sect.1.2 and added sect. 1.2.2. 1.2.0 03/07/07 added a2o, y2, y20 pins to positive supply. added pins f1, f20, j1, j20, m1, m20, r1, r20 to digital ground. added pins h16, p5, p16, p17 to agnd description.added pin d15 to nc 1.2.1 03/12/07 added pin v1 dgnd in pin list.

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